02In a decode GEMV over a row-major weight matrix, which thread-to-element mapping coalesces, and why does the transposed one not?▼easyNewNVIDIAOpenAIMetaunlockedTwo GEMV kernels do the same arithmetic on the same matrix and differ only in which thread reads which element. One streams at HBM speed; the other turns every warp load into 32 separate transactions.Open full answer →
03A kernel uses 128 registers per thread and 48 KB of shared memory per block. How many warps are active per SM on an H100?▼mediumNewNVIDIAAMDOpenAIunlockedOccupancy is the minimum of four separate budgets, and candidates usually compute one of them. The answer works all four for an H100, finds which one binds, and then asks whether raising occupancy would help at all.Open full answer →
04Your shared-memory transpose tile has bank conflicts. Do the bank arithmetic, apply the padding fix, and say when padding is the wrong fix.▼mediumNewNVIDIAAMDMetaunlockedThe one-column pad is the textbook fix, and it works for FP32 scalars. The answer derives why, then shows what happens with BF16 and with 16-byte vector stores, where the pad stops working and kernels swizzle instead.Open full answer →